1. Field of the Invention
The present invention relates to a spread spectrum communication apparatus using a TDD (Time Division Duplex) system, and more particularly to such an apparatus in which a synchronizing section is constructed such that frame synchronization can be made rapidly and stably.
2. Description of the Related Art
In recent years, a spread spectrum (SS) system has began to be utilized IN not only military communication but also public communication and personal communication since the system has advantageous properties such as random multiple-accessibility, speech confidentiality, interference resistance, and so forth. Particularly, the investigation of practical use of a spread spectrum communication using the TDD system has been advanced since it is easy to increase the number of channels.
In the TDD system, data is transmitted in such a manner that transmission and reception are made in a time division manner with a transmission frame and a reception frame being formed, as shown in FIGS. 1A to 1C. The frame is composed of a synchronization word for establishing synchronization and a data/voice frame for transmitting information.
Generally, in the spread spectrum communication, the synchronization word and data of the data/voice frame are spread by spread codes, respectively. Also, the synchronization with a bit signal arranged in the synchronization word is made to establish bit synchronization within one synchronization word.
However, that bit in the synchronization word at which the catch of bit synchronization is completed, depends on the situation of a transmission path. Accordingly, the time instant of establishment of the bit synchronization and the time instant of start of a frame do not have a fixed relationship therebetween.
Therefore, a frame synchronization word is inserted in the synchronization word, as shown in FIGS. 1A and 1B, so that the establishment of frame synchronization is made on the basis of the frame synchronization word. Also, registration data is inserted in the synchronization word. The registration data is data for enabling CDMA (Code Division Multiple Access) in the data/voice frame.
The construction of a base station or parent equipment in the conventional spread spectrum communication apparatus is shown in FIG. 2. The base station or parent equipment is provided with a microphone 1, a speaker 2, a CODEC section 3 for making a conversion between a voice and a voice signal, and a CPU section 5 for making the input/output of control data and controlling the whole of the system on the basis of the control data.
A sending block includes a FIFO (First-in First-out) 4 for making the velocity conversion of a transmit voice signal, a frame generator section 6 for generating a transmission frame, a transmit clock generator section 7 for generating transmission clocks which provide reference clocks of the system, a transmission frame timing generator section 8 for generating a timing necessary for the generation of a transmission frame, a spread code generator section 9 for generating a spread code in units of one chip, one-bit data being spread by the spread code into several-ten to several-thousand chips, a multiplier section 10 for multiplying transmit data by the spread code, and a D/A converter section 11 for converting a transmission baseband digital signal into a transmission baseband analog signal.
A receiving block includes an A/D converter section 12 for converting a reception baseband analog signal into a reception baseband digital signal, a matched filter 13 inputted with the reception baseband digital signal and the spread code to make an inverse spread of the reception baseband digital signal, a synchronization catch section 14 for outputting a bit synchronization catch completion signal when the inversely-spread signal (or the value of correlation) is not smaller than a reference value, a synchronization hold section 15 for receiving the synchronization catch completion signal to perform synchronization hold, a reproduction clock generator section 18 for outputting reproduction clock signals synchronous with the reception baseband signal from a VCO (voltage controlled oscillator) in a synchronization holding condition, a reception frame timing generator section 19 for generating a timing for necessary of the reproduction of a reception frame, a data reproducing section 20 for performing data reproduction, a frame divider section 21 for dividing the reception frame into reception reproduction data for control and a reception voice signal, an FIFO 22 for making the velocity conversion of a reception voice signal, and a frame synchronization word detector section 26 for detecting a frame synchronization word in the reception reproduction data outputted from the frame divider section 21 to output a frame synchronization word detection signal.
Unlike the base station or parent equipment (shown in FIG. 2), a terminal is not provided with the transmission clock generator section 7, as shown in FIG. 3. Instead, a transmission frame timing generator section 8 receives reproduction clock signals from a reproduction clock generator section 18 and a frame synchronization word detection signal for count-reset from a frame synchronization word detector section 26. The other construction of the terminal is the same as the construction of the base station or parent equipment.
Next, a synchronization establishing operation of the spread spectrum communication apparatus will be explained by use of FIGS. 2 and 3.
In the spread spectrum communication apparatus, reference clock signals providing the reference of the whole of the system are outputted from the transmission clock generator section 7 of the base station or parent equipment.
A basic form of communication between the base station or parent equipment and the terminal is such that the base station or parent equipment sends a transmission frame over a period of time allotted in a time division manner and the terminal receives the sent transmission frame as a reception frame. Next, the terminal sends a transmission frame over a period of time allotted in a time division manner and the base station or parent equipment receives the sent transmission frame as a reception frame. This is repeatedly carried out.
A transmit/receive processing performed by the terminal will now be explained by use of FIG. 3. First, when a power supply of the terminal is turned on, the terminal takes a wait mode (see FIG. 1B) until call-out or call-in is generated. In the wait mode, the transmission and reception of only the synchronization word is made in order to reduce the power consumption of the terminal. At this time, data of the synchronization word includes a frame synchronization word and registration data between communication apparatuses in the system (or data concerning the registration for the base station or parent equipment, spread codes used in a data/voice frame and the approval of speech).
In FIG. 2, when a transmission frame is sent from the base station or parent equipment, a change from a receive frame to a transmission frame is made by transmit I clock signals of the transmit clock generator section 7 which provide reference clock signals of the entire system. In this case, even if the reception is being made, the reception frame is discontinued.
The transmission frame timing generator section 8 shown in FIG. 2 outputs a transmission frame timing signal on the basis of the transmission clock signals outputted from the transmission clock generator section 7, in order to form the transmission frame as shown in FIGS. 1A to 1C. On the other hand, the CPU section 5 outputs a frame synchronization word and registration data.
The frame generator section 6 shown in FIG. 2 forms a transmission frame on the basis of the transmit frame timing signal outputted from the transmission frame timing generator section 8 and outputs it as transmission data. The multiplier section 10 multiplies the transmission data outputted from the frame generator section 6 by a spread code outputted from the spread code generator section 9 and outputs it as a transmission baseband digital signal. The D/A converter section 11 converts the transmission baseband digital signal into a transmission baseband analog signal which is in turn send to the line.
Next, when a reception frame in the wait mode is inputted to the terminal shown in FIG. 3, the A/D converter section 12 converts a reception baseband analog signal into a reception baseband digital signal which is in turn outputted. The matched filter 13 receives the reception baseband digital signal and a spread code outputted from the spread code generator section 9 so that the reception baseband digital signal is inversely spread to output a correlation value. On the basis of the correlation value outputted from the matched filter 13, the synchronization catch section 14 makes the judgement of whether or not bit synchronization is established. When the correlation value is not smaller than a reference value, the synchronization catch section 14 outputs a synchronization catch completion signal, judging the bit synchronization as being established.
When the synchronization catch completion signal outputted from the synchronization catch section 14 is received, the synchronization hold section 15 performs the holding of bit synchronization. Generally, the synchronization hold section 15 is constructed by a DLL (Delay Locked Loop) and is capable of synchronization hold at a precision which is not larger than .+-.1/2 chips for one bit. Also, the synchronization hold section 15 outputs an error signal indicating an error between the correlation value outputted from the matched filter 13 and the reference value. The reproduction clock generator section 18 receives the error signal to control the voltage controlled oscillator VCO incorporated therein so that reproduction clock signals are outputted at the above-mentioned precision.
The data reproducing section 20 receives the reception data inversely spread by the matched filter 13 and outputs correct reproduction data after the synchronization catch section 14 has completed the catch of synchronization by outputting the synchronization catch completion signal. The frame divider section 21 receives a reception frame timing signal outputted from the reception frame timing generator section 19 so that the reception frame is divided, as shown in FIGS. 1A to 1C, to output reception reproduction data. Namely, the reception frame is composed of a synchronization word, a data frame and a voice frame, as shown in FIG. 1A, and the frame divider section 21 outputs the voice frame to the FIFO 22 and outputs the synchronization word and the data frame to the CPU section 5.
The frame synchronization word detector section 26 extracts the frame synchronization word from the reception reproduction data outputted from the data reproducing section 20 to output a frame synchronization word detection signal (see FIG. 1C).
The transmission frame timing generator section 8 or the reception frame timing generator section 19 receives the frame synchronization detection signal as a reset signal to newly start a counting operation based on reproduction clock signals and outputs a transmission frame timing signal or a reception frame timing signal when the count number reaches a fixed number.
Further, registration data outputted from the frame divider section 21 is inputted to the CPU section 5. Thus, the CPU section 5 makes the exchange of data concerning the registration for the base station or parent equipment, spread codes used in a data/voice frame and the approval of speech.
The transmission clock generator section 7 is possessed by only the base station or parent equipment (see FIG. 2). The transmission clock generator section 7 is not provided in the terminal (see FIG. 3). Instead, the transmission frame timing generator section 8 of the terminal receives the reproduction clock signals from the reproduction clock generator section 18 and the frame synchronization word detection signal from the frame synchronization word detector section 26 to generate a transmission timing.
When the transmission frame in the wait mode is to be sent from the terminal, the transmission frame timing generator section 8 of the terminal newly starts a counting operation based on reproduction clock signals with the frame synchronization detection signal being received as a reset signal and outputs a transmission frame timing signal when the count number reaches a fixed number. The CPU section 5 outputs a frame synchronization word and registration data.
The frame generator section 6 receives those signals to form the transmission frame shown in FIG. 1B and outputs the transmission frame as transmission data. The multiplier section 10 multiplies the transmission data by a spread code outputted from the spread code generator section 9 to output it as a transmission baseband digital signal. The D/A converter section 11 converts the transmission baseband digital signal into a transmission baseband analog signal which is in turn outputted.
The reception of the reception frame in the wait mode by the base station or parent equipment is similar to the reception of the reception frame in the wait mode by the terminal.
In general, in order to make sure frame synchronization in the above operation, the transfer to frame synchronization hold is made after the frame synchronization words of several frames in the wait mode are checked.
In the case of a speech mode, the operation of the synchronizing system in the terminal and the base station or parent equipment is basically the same as that explained in the foregoing. In this case, when a user inputs a voice from the microphone 1, the microphone 1 outputs a transmission voice. The transmission voice is converted by the CODEC section 3 into a transmission voice signal which is in turn outputted to the FIFO 4. The FIFO 4 makes the velocity conversion of the transmission voice signal so that the transmission voice signal is taken into a voice frame of the transmission frame. The velocity-converted transmission voice signal is outputted to the frame generator section 6.
The FIFO 22 has an input/output relationship reverse to that of the FIFO 4. The FIFO 22 receives a reception signal before velocity conversion to output a receive voice signal. At this time, the CODEC section 3 receives the reception voice signal to output a reception voice. The speaker 2 receives the reception signal to output a voice.
When the transmission frame is to be sent, the transmission frame timing generator section 8 outputs a transmission frame timing signal. The frame generator section 6 inputted with this transmission frame timing signal outputs transmission data in which a frame synchronization word and registration data are arranged at a predetermined position of the transmission frame and data and a transmission voice signal after velocity conversion are arranged in a data frame. The spread code generator section 9 outputs a spread code, and the multiplier section 10 receives the spread code and the transmission data to output a transmission baseband digital signal after velocity conversion. The D/A converter section 11 converts the transmission baseband digital signal into a transmission baseband analog signal which is in turn outputted.
On the other hand, when a reception frame is received, the A/D converter section 12 converts a reception baseband analog signal into a reception baseband digital signal. Thereafter, the matched filter 13 receives the reception baseband digital signal and the spread code so that the reception baseband digital signal is inversely spread and is then outputted as reception data. The data reproducing section 20 inputted with the reception data outputs reproduction data. The frame divider section 21 inputted with the reproduction data and a reception frame timing signal makes the frame division of the reception frame of the reproduction data to output reception reproduction data and a reception signal before velocity conversion. As has been mentioned in the above, the reception signal before velocity conversion is passed through the FIFO 22 and the CODEC section 3 and is thereafter converted by the speaker 2 into a voice which is in turn outputted. Also, the reception reproduction data is inputted to the CPU section 5 which in turn reflects the result in registration data and data when a transmission frame is sent.
However, the conventional spread spectrum communication apparatus has the following problems in establishing synchronization.
A first problem lies in that since the transfer to the holding of frame synchronization is made after the frame synchronization words of several frames have been checked, a long time is required until the establishment of frame synchronization. If the transfer is made in a short time, the reliability of frame synchronization is deteriorated.
Also, in the case where a frequency deviation between transmission and reception clock signals is large, the following problem is generated. Namely, the transmission and reception between the base station or parent equipment and the terminal is such that the base station or parent equipment sends a transmission frame, the terminal receives this transmission frame as a reception frame, the terminal sends a transmission frame, and the base station or parent equipment receives this transmission frame as a reception frame. In this repeated process, when the terminal is receiving the reception frame, the terminal is capable being synchronous with the transmission clock signals of the base station or parent equipment.
However, when the terminal begins to send the transmission frame, the terminal cannot hold the synchronization with the transmission clock signals of the base station or parent equipment since there is no reception frame. If the terminal sends the transmission frame in a state in which the holding of synchronization is not made, the following may take place. Namely, in the worst case when a frequency deviation between the transmission clock signals of the base station or parent equipment and the transmission clocks of the terminal is large, the base station or parent equipment turns to the transmission frame in a state in which it cannot reception several bits of the last portion of the reception frame. As a result, the base station or parent equipment is not capable of accurate data reproduction.
Further, a general case is that in a wait condition (or before call out or call in), only a synchronization word is communicated in order to reduce the power consumption. In such a case, the problem of frequency deviation becomes greater.